Final presentation of the design

Final presentation of the design.

In this advance, all of the objectives have been completed and the presentation is here. Also you can download the .jelib file which contains the design in electric format and the library used.

It can be access by Google Docs. https://docs.google.com/presentation/d/1XAxohRVTJGIdE1dUHGC7QcliQiZqaxDNq-5RChTOqa8/pub?start=false&loop=false&delayms=3000,

and also the file of VLSI Electric is available in this link: https://drive.google.com/file/d/0B6RLCqU_0rjGcHhUUlFNRG5jUk0/edit?usp=sharing


That is funny since until this point there is a half of the job because still is necessary to analyze both the electrical effort and the logical effort.


Here you will see simulations and foundations.